d-Matrix Raptor
First 3D-DRAM accelerator, stacking compute directly on custom memory
N/A
Datacenter
32GB
3D-DRAM
100000
GB/s bandwidth
4nm
process
d-Matrix presented Raptor at Hot Chips 2026, which it calls the first 3D-DRAM accelerator built for generative inference. Rather than routing through a conventional memory PHY, Raptor bonds a TSMC 4nm compute die face-to-face onto a custom-designed DRAM die at a 36-micron pitch, delivering 100 TB/s of bandwidth from 32GB of memory per card at roughly 0.37 picojoules per bit, well below the energy cost of moving data into an HBM4 base die. d-Matrix’s accompanying ISCA 2026 paper projects about 4.7 times higher inference throughput per card than HBM-based designs. The company’s CEO has said Raptor is on track to launch in 2027.